Performance Analysis of 5:2 compressor with 58 transistors

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dc.contributor.authorKothakonda Durga Bhavani
dc.contributor.authorR. Sireesha
dc.contributor.authorK. Raju
dc.contributor.authorGanesh Kumar Marathula
dc.contributor.authorRatalaKoteswara Naik
dc.contributor.authorSanam Nagedram
dc.coverage.spatialBolivia
dc.date.accessioned2026-03-22T16:35:40Z
dc.date.available2026-03-22T16:35:40Z
dc.date.issued2021
dc.descriptionCitaciones: 1
dc.description.abstractAbstract In the present generation of VLSI domain, designing a circuit with less power, area, and delay has become challenge for every designer. In this article we have design and implemented a design for 5:2 compressor which is the vital component in CMOS multiplier circuits. The proposed compressor circuit design requires less transistor count i.e. 58 transistors. The Simulation results of proposed 5:2 compressor has substantially expanded the performance of power delay in contrast to earlier designs.
dc.identifier.doi10.1088/1742-6596/1804/1/012162
dc.identifier.urihttps://doi.org/10.1088/1742-6596/1804/1/012162
dc.identifier.urihttps://andeanlibrary.org/handle/123456789/59163
dc.language.isoen
dc.publisherIOP Publishing
dc.relation.ispartofJournal of Physics Conference Series
dc.sourceKoneru Lakshmaiah Education Foundation
dc.subjectGas compressor
dc.subjectMultiplier (economics)
dc.subjectTransistor count
dc.subjectVery-large-scale integration
dc.subjectCMOS
dc.subjectTransistor
dc.subjectComputer science
dc.subjectElectronic engineering
dc.subjectElectronic circuit
dc.subjectPower (physics)
dc.titlePerformance Analysis of 5:2 compressor with 58 transistors
dc.typearticle

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